A method for making a conventional semiconductor device with a film carrier tape is as follows:
Prepared is a base film which is made of polyimide, polyester, glass-epoxy or the like and in which sprocket holes for carrying and positioning and device holes for placing semiconductor devices are opened. A metal foil of copper or the like is adhered to the base film by adhesives, thereafter etching the metal foil to form leads with given shapes and pads for electrical selection.
Next, the inner lead bonding (hereinafter referred to as "ILB") of the leads extending in the device hole of the film carrier tape to bumps formed on electrodes of an IC chip is carried out by a thermo-compression method of eutectic method. In the film carrier tape, an electrical selection test and BT (burn-in test) is then conducted. Whereafter, the leads are cut to desirable lengths to carry out outer lead bonding (hereinafter referred to as "OLB").
Herein, in the case of leads with many pins, to prevent the portions for OLB from scattering, a method of leaving insulating film composing the film carrier tape on the outer end of the outer leads is often employed. Thereafter, mounting is carried out, for example, by OLB of the leads to the bonding pads on a printed substrate.
In such method for mounting the semiconductor device with a film carrier tape, when OLB to the printed substrate is carried out, it is difficult to obtain coplanarity in leads for OLB since the lead for OLB is thin to about 35 .mu.m. To deal with this, a bonding tool for OLB which is only used for a film carrier tape was required.
On the other hand, when it is mounted on the same substrate with another package which can be mounted by package re-flowing, for example, QFP (Quad Flat Package), the mounting thereof has to be carried out on the step separated from the re-flowing step. Because of this, a film carrier tape type semiconductor device is exactly used as a special package since it is not multipurpose.
Herein, the outer re-flow pitch in QFP which can be re-flown is limited to about 0.4 mm.
As a surface mounting type package for adapting to the limitation, "Nikkei Microdevices", pp. 58-64, March, 1994 describes BGA (Ball Grid Allay) in which solder bumps as outer terminals are disposed in the form of a lattice on the backside of the package. When a package with 220 pins and a square size of 23 to 24 mm is designed, BGA can realize a pitch of about 1.5 mm, whereas QFP needs a pitch of at least about 0.4 mm. Therefore, BGA is excellent in the mounting performance.
Further, since the outer size of BGA is small, the length of wiring in the package becomes shorter, thereby obtaining a good electrical properties. Though this BGA package uses a multilayer printed substrate, it can employ a ceramic substrate or film carrier tape.
For example, as BGA using a film carrier tape, there is a BGA package (hereinafter referred to as "first prior art") suggested by IBM corporation (EIAJ-JEDEC JWG#2-7 "TAPE BALL GRID ARRAY", May, 1994).
FIG. 1A is a cross sectional view showing the BGA package, and FIG. 1B is a enlarged cross sectional view showing a part of the BGA package which is indicated by a circle B in FIG. 1A.
In the BGA package, a copper-foil wiring 3 formed on a base film 2 is connected to a land 3b formed under the base film and a through-hole plating 3d, i.e., the film carrier tape is composed by so called a two layers-two metal technique. In the land 3b, a solder bump as an outer terminal is formed by providing a solder ball 11. A bump 1b on a semiconductor IC chip 1 is connected to the inner lead 3a of the copper-foil wiring 3. Further, a reinforcing plate 13 is pasted by an adhesive 12 thereon to reinforce the film carrier tape, and a heat spreader 15 is pasted by adhesives 10, 14 on the semiconductor IC chip 1 and reinforcing plate 13 to reduce the heat resistance.
When the BGA semiconductor device is mounted on the mounting substrate, solder paste is provided with the pads on the mounting substrate, thereafter adhering to the solder ball 11 to mount it.
However, in the BGA package with a film carrier tape, the cost making thereof increases to about five to ten times as compared with a film carrier tape made by a conventional three layers-one metal technique, since the film carrier tape thereof is made by the two layers-two metal technique.
On the other hand, the film carrier tape made by the two layers-two metal technique is subject to lack of mechanical strength caused by the tape thickness of about 50 to 70 .mu.m, thereby causing an undulation or bend of the substrate to reduce the easiness of mounting which is a excellent property of BGA. Therefore, it needs the reinforcing plate 13 for reinforcing the mechanical strength. However, there is a problem that the solder ball 11 as a connecting means to the substrate can not be checked with the naked eye after mounting. Though the mounting state can be optionally checked by the other way, for example, a x-ray instrument, it is not a proper way for the mass production and it will result in a package with high cost. In brief, the first prior art lacks in the easiness of mounting and it is not multipurpose to various use.
Next, Japanese Patent Applications Laid-Open No. 61-51945 and 1-258454 disclose another type of semiconductor device in which the state of soldering after mounting can be checked on a package substrate. FIGS. 2A and 2B shows the semiconductor device disclosed in Japanese Patent Applications Laid-Open No. 1-258454 (hereinafter referred to as "second prior art").
The semiconductor device is called LGA (Land Grid Array). It uses a rigid substrate as a package substrate 16 which is similar to that of the above-mentioned standard BGA package, forming a copper-foil wiring on and under the substrate 16, connecting between lands 17a and 17b which are formed in a grid form on and under the substrate by through-hole plating 17c, further compressing and bonding a copper plate to the center of the backside of the substrate. Solder plating 19 is provided with the land 17b.
A semiconductor IC chip 1 is adhered by an adhesive 10 to the concave portion formed in the center of the substrate. The semiconductor IC chip 1 and the copper-foil wiring 17 are connected by a bonding wire 20, thereafter being sealed with sealing resin 5.
When the LGA package is mounted on a mounting substrate 9, as shown in FIG. 2B, solder paste is previously coated to the pads on eh mounting substrate 9 by a screen printing method or the like, positioning and mounting the LGA package to the mounting substrate 9 and re-flowing the solder.
In the mounting, i.e., re-flowing, process, solder 21 on the mounting substrate 9 climbs up passing the through-hole to form climbed solder 21a. The solder junction between the mounting substrate 9 and the package substrate 16 can be checked through the climbed solder 21.
On the other hand, Japanese Patent Application Laid-Open No. 63-34936 discloses a LGA package with a film carrier tape (hereinafter referred to as "third prior art"). This package is made by forming a copper-foil wiring on the film carrier tape, forming a land on the backside of the tape, connecting them by a through-hole and carrying out ILB of a semiconductor IC chip to the inner leads of the copper-foil wiring. Similarly to the second prior art, this package is mounted after solder paste is previously coated to a mounting substrate.
However, in this package, it is not impossible to check the state of the solder junction from outside after mounting since the copper-foil wiring on the substrate is formed to cover the through-hole.
Accordingly, in the BGA or LGA type semiconductor device, mass producibility, excellent mounting performance, easiness of outside checking after mounting, low package cost and the like are required. Among these requirements, the easiness of outside checking is a most important requirement since it relates to an electrical test, repairing etc. after mounting.
Hereon, the first and third prior arts have a problem that the state of the solder junction can not be observed after mounting. In addition, in the first prior art, the package cost becomes higher since the package employs a film carrier tape of two layers-two metals structure, and the package lacks in mass producibility since it needs the reinforcing plate 13.
In the second prior art, as shown in FIG. 2B, it is possible to check the state of the solder junction from outside after mounting. However, this package lacks in mass producibility in that it uses a rigid substrate as a substrate, as compared with a package using a film carrier tape. Further, in this package structure, the through-hole plating 17c, the solder plating 19 on the land 17b and the copper plate 18 for maintaining the level even to the soldered portion after mounting are required. Thus, the package structure is complex, and the package cost becomes higher.
In addition, in the second and third prior arts, solder required in mounting is provided not with the package but with the mounting substrate. The solder of solder paste or the like is supplied to a screen printing method. For example, when the pitch P3 between the lands 17b is 1.27 mm, the diameter of the land is to be about 0.5 to 0.6 mm. Herein, the gap between the package and the mounting substrate after mounting needs to be about 0.5 to 1.0 mm in order to securely connect therebetween and reduce a thermal stress occurred therebetween by the difference in their thermal expansion coefficients. Therefore, it is necessary to supply solder paste to have a thickness of 1.0 to 1.5 mm to the land with a diameter of about 0.5 to 0.6 mm. As a result, the package in the second and third prior arts lack in easiness of mounting.